Zooming Out: Heterogeneous Inference and Chip-to-Rack Quality Verification.

Anton McGonnel, Vice President of Product, and Kwasi Ankomah, Director of AI Solutions at
SambaNova gave either address at COMPUTEX on June 4 just one

Anton McGonnel, Vice President of Product, and Kwasi Ankomah, Director of AI Solutions at SambaNova gave either address at COMPUTEX on June 4 just one day after SambaNova CEO Rodrigo Liang joined Intel CEO Lip-Bu Tan and Vista Equity Partners chairman Robert Smith to announce Vector Core Compute. The platform is billed as the world’s first commercially available enterprise inference cloud built on a heterogeneous, disaggregated inference architecture.

McGonnel argued that no single processor can efficiently meet the demands of agentic AI. While GPUs excel at model training and the “prefill” stage, where input tokens are processed, they are not necessarily optimized for inference, or the “decoding” stage, in which output tokens are generated sequentially.

SambaNova’s solution is the Reconfigurable Dataflow Unit (RDU), a processor designed specifically for decoding workloads. According to McGonnel, RDUs combine high throughput with architecture optimized for inference, allowing different processors within a heterogeneous system to handle distinct stages of the same AI task.

To demonstrate the concept, Ankomah connected live to Vector Core Compute’s Los Angeles data center and ran a 10,000-record dataset through a fully agentic machine-learning workflow. In the demonstration, GPUs handled the prefill stage, RDUs performed decoding, and CPUs managed tool calls and orchestration.

The workflow was completed in roughly 45 seconds. According to SambaNova, this represented a two- to three-fold speed improvement over comparable systems relying solely on NVIDIA B200 GPUs.

“When I started as a data scientist, this sort of task would take several days,” Ankomah said.

Next, ZEISS’s Global Head of Sales Tonmoy Kundu, and Electronic Customer Segment Clive Yen took to the stage to discuss the company’s role in enabling next-generation AI hardware through advanced inspection and metrology technologies.

“AI is not just software, AI is infrastructure,” Kundu said. “It requires chips, systems, power and cooling all working together at scale.”

Yen explained that as AI workloads drive demand for increasingly complex semiconductor packaging, manufacturing defects can have significant impacts on signal integrity, power delivery, and long-term reliability. ZEISS’s industrial X-ray microscopy technology allows PCB makers to inspect composition and internal structures of individual stack layers, and scan for defects.

Compute demands are also calling for rising heights and shrinking interconnect dimensions of High Bandwidth Memory (HBM) stacks, which can lead to warpage of vias. Kundu noted that some manufacturers are exploring glass substrates as an alternative to silicon to mitigate these issues.

“Glass solves the warpage issue,” he said, “but it’s a nightmare for microscopy.” New imaging techniques are needed for finding defects in the glass, however, which ZEISS is currently working on in order to support the roll-out of next generation packages.

The company is also advancing Co-Packaged Optics (CPO) technologies, which integrate optical and electrical components to reduce power consumption and signal loss in AI systems.

“Quality doesn’t just matter for enabling AI,” Kundu concluded. “Quality is directly equal to billions of dollars that drive this industry forward.”

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